Byte address of memory word

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In computing, a memory address is a reference to a specific memory location used at various levels by software and hardware.^[1] Memory addresses are fixed-length sequences of digits conventionally displayed and manipulated as unsigned integers. Such numerical semantic bases itself upon features of CPU (such as the instruction pointer and incremental address registers), as well upon use of the memory like an array endorsed by various programming languages.

Types[edit]

Physical addresses[edit]

A digital computer’s main memory consists of many memory locations. Each memory location has a physical address which is a code. The CPU (or other device) can use the code to access the corresponding memory location. Generally only system software, i.e. the BIOS, operating systems, and some specialized utility programs (e.g., memory testers), address physical memory using machine code operands or processor registers, instructing the CPU to direct a hardware device, called the memory controller, to use the memory bus or system bus, or separate control, address and data busses, to execute the program’s commands. The memory controllers’ bus consists of a number of parallel lines, each represented by a binary digit (bit). The width of the bus, and thus the number of addressable storage units, and the number of bits in each unit, varies among computers.

Logical addresses[edit]

A computer program uses memory addresses to execute machine code, and to store and retrieve data. In early computers logical and physical addresses corresponded, but since the introduction of virtual memory most application programs do not have a knowledge of physical addresses. Rather, they address logical addresses, or virtual addresses, using the computer’s memory management unit and operating system memory mapping; see below.

Unit of address resolution[edit]

Most modern computers are byte-addressable. Each address identifies a single byte (eight bits) of storage. Data larger than a single byte may be stored in a sequence of consecutive addresses. There exist word-addressable computers, where the minimal addressable storage unit is exactly the processor’s word. For example, the Data General Nova minicomputer, and the Texas Instruments TMS9900 and National Semiconductor IMP-16 microcomputers used 16 bit words, and there were many 36-bit mainframe computers (e.g., PDP-10) which used 18-bit word addressing, not byte addressing, giving an address space of 2¹⁸ 36-bit words, approximately 1 megabyte of storage. The efficiency of addressing of memory depends on the bit size of the bus used for addresses – the more bits used, the more addresses are available to the computer. For example, an 8-bit-byte-addressable machine with a 20-bit address bus (e.g. Intel 8086) can address 2²⁰ (1,048,576) memory locations, or one MiB of memory, while a 32-bit bus (e.g. Intel 80386) addresses 2³² (4,294,967,296) locations, or a 4 GiB address space. In contrast, a 36-bit word-addressable machine with an 18-bit address bus addresses only 2¹⁸ (262,144) 36-bit locations (9,437,184 bits), equivalent to 1,179,648 8-bit bytes, or 1152 KiB, or 1.125 MiB — slightly more than the 8086.

Some older computers (decimal computers), were decimal digit-addressable. For example, each address in the IBM 1620’s magnetic-core memory identified a single six bit binary-coded decimal digit, consisting of a parity bit, flag bit and four numerical bits. The 1620 used 5-digit decimal addresses, so in theory the highest possible address was 99,999. In practice, the CPU supported 20,000 memory locations, and up to two optional external memory units could be added, each supporting 20,000 addresses, for a total of 60,000 (00000–59999).

Word size versus address size[edit]

Word size is a characteristic of computer architecture denoting the number of bits that a CPU can process at one time. Modern processors, including embedded systems, usually have a word size of 8, 16, 24, 32 or 64 bits; most current general-purpose computers use 32 or 64 bits. Many different sizes have been used historically, including 8, 9, 10, 12, 18, 24, 36, 39, 40, 48 and 60 bits.

Very often, when referring to the word size of a modern computer, one is also describing the size of address space on that computer. For instance, a computer said to be «32-bit» also usually allows 32-bit memory addresses; a byte-addressable 32-bit computer can address 2³² = 4,294,967,296 bytes of memory, or 4 gibibytes (GiB). This allows one memory address to be efficiently stored in one word.

However, this does not always hold true. Computers can have memory addresses larger or smaller than their word size. For instance, many 8-bit processors, such as the MOS Technology 6502, supported 16-bit addresses— if not, they would have been limited to a mere 256 bytes of memory addressing. The 16-bit Intel 8088 and Intel 8086 supported 20-bit addressing via segmentation, allowing them to access 1 MiB rather than 64 KiB of memory. All Intel Pentium processors since the Pentium Pro include Physical Address Extensions (PAE) which support mapping 36-bit physical addresses to 32-bit virtual addresses. Many early processors held 2 addresses per word , such as 36-bit processors.

In theory, modern byte-addressable 64-bit computers can address 2⁶⁴ bytes (16 exbibytes), but in practice the amount of memory is limited by the CPU, the memory controller, or the printed circuit board design (e.g., number of physical memory connectors or amount of soldered-on memory).

Contents of each memory location[edit]

Each memory location in a stored-program computer holds a binary number or decimal number of some sort. Its interpretation, as data of some data type or as an instruction, and use are determined by the instructions which retrieve and manipulate it.

Some early programmers combined instructions and data in words as a way to save memory, when it was expensive: The Manchester Mark 1 had space in its 40-bit words to store little bits of data – its processor ignored a small section in the middle of a word – and that was often exploited as extra data storage.^{[citation needed]} Self-replicating programs such as viruses treat themselves sometimes as data and sometimes as instructions. Self-modifying code is generally deprecated nowadays, as it makes testing and maintenance disproportionally difficult to the saving of a few bytes, and can also give incorrect results because of the compiler or processor’s assumptions about the machine’s state, but is still sometimes used deliberately, with great care.

Address space in application programming[edit]

In modern multitasking environment, an application process usually has in its address space (or spaces) chunks of memory of following types:

• Machine code, including:
  • program’s own code (historically known as code segment or text segment);
  • shared libraries.
• Data, including:
  • initialized data (data segment);
  • uninitialized (but allocated) variables;
  • run-time stack;
  • heap;
  • shared memory and memory mapped files.

Some parts of address space may be not mapped at all.

Some systems have a «split» memory architecture where machine code, constants, and data are in different locations, and may have different address sizes.
For example, PIC18 microcontrollers have a 21-bit program counter to address machine code and constants in Flash memory, and 12-bit address registers to address data in SRAM.

Addressing schemes[edit]

A computer program can access an address given explicitly – in low-level programming this is usually called an absolute address, or sometimes a specific address, and is known as pointer data type in higher-level languages. But a program can also use relative address which specifies a location in relation to somewhere else (the base address). There are many more indirect addressing modes.

Mapping logical addresses to physical and virtual memory also adds several levels of indirection; see below.

Memory models[edit]

Many programmers prefer to address memory such that there is no distinction between code space and data space (see above), as well as from physical and virtual memory (see above) — in other words, numerically identical pointers refer to exactly the same byte of RAM.

However, many early computers did not support such a flat memory model — in particular, Harvard architecture machines force program storage to be completely separate from data storage.
Many modern DSPs (such as the Motorola 56000) have three separate storage areas — program storage, coefficient storage, and data storage. Some commonly used instructions fetch from all three areas simultaneously — fewer storage areas (even if there were the same total bytes of storage) would make those instructions run slower.

Memory models in x86 architecture[edit]

Early x86 processors use the segmented memory model addresses based on a combination of two numbers: a memory segment, and an offset within that segment.

Some segments are implicitly treated as code segments, dedicated for instructions, stack segments, or normal data segments. Although the usages are different, the segments do not have different memory protections reflecting this.
In the flat memory model all segments (segment registers) are generally set to zero, and only offsets are variable.

See also[edit]

• Base address
• Endianness
• Low-level programming language

• Memory address register

• Memory allocation
• Memory management unit (MMU)
• Memory model (programming)
• Memory protection
• Memory segmentation
• Offset (computer science), also known as a displacement
• Page table

References[edit]

• A byte is a memory unit for storage
• A memory chip is full of such bytes.

Memory units are addressable. That is the only way we can use memory.

In reality, memory is only byte addressable. It means:

• A binary address always points to a single byte only.
• A word is just a group of bytes – 2, 4, 8 depending upon the data bus size of the CPU.

To understand the memory operation fully, you must be familiar with the various registers of the CPU and the memory ports of the RAM. I assume you know their meaning:

• MAR(memory address register)
• MDR(memory data register)
• PC(program counter register)
• MBR(memory buffer register)

RAM has two kinds of memory ports:

1. 32-bits for data/addresses
2. 8-bit for OPCODE.

Suppose CPU wants to read a word (say 4 bytes) from the address xyz onwards. CPU would put the address on the MAR, sends a memory read signal to the memory controller chip. On receiving the address and read signal, memory controller would connect the data bus to 32-bit port and 4 bytes starting from the address xyz would flow out of the port to the MDR.

If the CPU wants to fetch the next instruction, it would put the address onto the PC register and sends a fetch signal to the memory controller. On receiving the address and fetch signal, memory controller would connect the data bus to 8-bit port and a single byte long opcode located at the address received would flow out of the RAM into the CPU‘s MDR.

So that is what it means when we say a certain register is memory addressable or byte addressable. Now what will happen when you put, say decimal 2 in binary on the MAR with an intention to read the word 2, not (byte no 2)?

Word no 2 means bytes 4, 5, 6, 7 for 32-bit machine. In real physical memory is byte addressable only. So there is a trick to handle word addressing.

When MAR is placed on the address bus, its 32-bits do not map onto the 32 address lines(0-31 respectively). Instead, MAR bit 0 is wired to address bus line 2, MAR bit 1 is wired to address bus line 3 and so on. The upper 2 bits of MAR are discarded since they are only needed for word addresses above 2^32 none of which are legal for our 32 bit machine.
Using this mapping, when MAR is 1, address 4 is put on the bus, when MAR is 2, address 8 is put on the bus and so forth.

It is a bit difficult in the beginning to understand. I learnt it from Andrew Tanenbaums‘s structured computer organisation.

Memory plays a vital role in any computer system and it is very important to understand how it works and how it stores the data. In general, we know that computer memory stores the data after converting into bits or bytes (which is nothing but collection of bits). In this article, we are going to explain how this storage take place and how to address those storage blocks.

Data, or in simple language, every word that we provide to a computer system is being stored in a memory, whether in temporary cache or permanent memory. But before storing it to memory, there is conversion of word into bits. Now the collection of these bits is going to be stored in the memory. The memory of a computer system is divided into chunks or we can say «sections» which basically hold the converted bits.

What is Word Addressable Memory?

Let us take an example. Suppose your computer memory configuration is 4096 * 32 bit which means that it has 4096 locations or sections and each of these sections can hold a word of size 32 bits. And let us suppose the address of the first section among 4096 sections is ‘i’, then the address of its subsequent section would be ‘i+1’ and of next is ‘i+3’, and so on. This type of addressing in which we treat each section of memory which is that storage of 32 bits or 4 bytes is known as Word Addressable Memory.

What is Byte Addressable Memory?

Continuing with the same example, we have a total of 4096 sections and each section stores a word of length 32 bits or simply 4 bytes. We can access each of these sections by adding one consecutive number to its current location, i.e., ‘i’, then next location is ‘i+1’, then ‘i+2’, and so on.

If the memory section which is storing the words is further treated as subsections of 4, i.e., as each section which is storing a word of 4 byte is divided in 4 subsection and each subsection is storing 1 byte.

Let us suppose that each subsection has an address, now each subsection has address like ‘j’ next would be ‘j+1’ then ‘j+3’ and so on. If we take the address of one section as ‘j’, then the address of the next section would be ‘j+4’, then for the next would be ‘j+8’, and so on.

This type of addressing in which the number of subsections, i.e., number of bytes stored in a section is added to get the address of the next section is known as Byte Addressable Memory.

If we take ‘i’ address in Word Addressable memory and ‘j’ in Byte Addressable memory address, then ‘i’ = ‘j’ ; ‘i=1’ = ‘j+4’ ; ‘i=3’ = ‘j+8’, and so on.

Difference between Byte Addressable Memory and Word Addressable Memory

The following are the important differences between byte addressable memory and word addressable memory −

Conclusion

Both Byte addressable memory and Word addressable memory have address size that can be of any number of bits depending upon the number of cells in memory chip. But, the cell size is different in each case.

The most significant difference that you should note here is that byte addressable memory uses bytewise data storage, whereas word addressable memory uses wordwise data storage.